Intel to take on AMD at its own cache game with *checks notes* ADM.
The base tile for Intel’s upcoming Meteor Lake processors will contain a large L4 cache, potentially helping squeeze more performance out of the integrated graphics chip and boosting boot times.
I love a good techie codename, and Intel’s Adamantine is one of my favourite recent ones. It’s only recently come to light via a patent that has been unearthed, which details this solid base tile for the company’s first true chiplet CPU, Meteor Lake.
Yeah, I’ll admit when I first saw it I thought it was a nerdy Wolverine reference, too, but it just means ‘unable to be broken’, which I guess is pretty much the same. Kinda.
Anyways, the patent was filed a couple of years back, but has recently been brought to the attention of ComputerBase, who had been talking about Meteor Lake having some extra pool of L4 cache for a little while.
It had initially thought the extra L4 was purely a sort of Infinity Cache analog—similar to that used by AMD for its modern graphics cards—or an eDRAM cache clone, to improve the speeds of the built-in Xe graphics cores. This was the theory anyway, particularly because the Linux patch notes described how the iGPU would no longer have access to the compute tile’s L3 cache.
But the patent actually goes further, describing that the L4 cache—with access time for the L4 cache being potentially “much less than the DRAM access time” of system memory—will also help with boot optimisations. As primarily a laptop part, Meteor Lake chips coming with such optimisations, thanks to an easily accessible memory cache, could make a system boot much quicker out of sleep or hibernation modes.
(Image credit: Intel)
Having a large pool of L4 cache available to the integrated graphics, especially as it could almost be dedicated GPU cache when the system is running, could do very good things for the graphics performance of a Meteor Lake laptop, too. The top 128 EU Xe GPU tile in the chip could then deliver some pretty tasty 1080p gaming performance with a little extra cache fillip.
About Post Author
