Intel says there will be one trillion transistors on chips by 2030

During the IEEE International Electron Devices Meeting (or IEDM), Intel claimed that by 2030, there would be circuits with transistor counts of a trillion, roughly ten times the number of transistors currently available on modern CPUs. 

At the meeting, Intel’s Components Research Group laid down its prediction for the future of circuits manufacturing (via sweclockers) and how new packaging technologies and materials will allow chipmakers to build chips with 10x the transistor density, keeping in Moore’s Law.

Moore’s Law is a principle that states the speed and capabilities of computers are expected to double every two years as the number of transistors that fit on a microchip increases. If my math is somewhat accurate, hitting a trillion transistors in 8 years isn’t that far-fetched if the industry manages to double its current number every two years until then. 

It’s doable but not easy, considering there’s only so much space on a chip. AMD agrees that Moore’s Law isn’t dead, that you “could double transistor density every 18-24 months but no longer at the same cost bands,” according to AMD’s Mark Papermaster in a recent Q&A.

Transistors act like tiny switches inside a processor allowing an electrical current to flow through a chip. Depending on what it is, a chip could have millions or billions of transistors. Currently, the largest transistor count on a commercial processor is 114 billion. That distinct honor goes to Apple’s M1 Ultra chip inside its Mac Studio desktop computer. Nvidia’s RTX 4090 GPU has around 76 billion transistors, and Intel’s Ponte Vecchio supercomputing GPU has around 100 billion of them.

But how does Intel plan to reach a trillion? The company is moving on from its monolithic circuit design in favor of a chiplet design, like its rival AMD. This chiplet design lets Intel split into several circuits giving it more space to add transistors via discrete dies, which is also more cost-effective.

Its first chiplet design, the Meteor Lake CPU due out next year, is taking advantage of Intel’s Foveros stacking technology, which enables them to ‘stack’ an Arc GPU on top of its compute and SoC components. In this way it will be able to increase the performance of its integrated graphics. These tiles, as Intel calls them, combine to make a larger chip that lets the chipmaker scale up or down its GPU and IO components on Meteor Lake chips.

Intel is also looking at super-thin 2D material (the thickness of 3 atoms) to cram more transistors onto a single chip. 

In a press release, Intel’s GM of components research, Gary Patton, wrote, “Seventy-five years since the invention of the transistor, innovation driving Moore’s Law continues to address the world’s exponentially increasing demand for computing.” He continued to say that research advancements need to “break through current and future barriers” to keep Moore’s Law alive. 

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